Graphics systems sometimes employ tiling to store pixel data in a graphics memory. Tiling is a memory addressing mode in which a square or rectangular pixel area is mapped into consecutive addresses to improve memory access coherence. The number of pixels associated with an individual tile may vary depending upon the design of the graphics system. A tile commonly includes different types of graphical data. In some graphics processing units (GPUs), tiles are used to store combined z data (also known as depth data) and stencil data (also known as “s” data).
A drawback of conventional tiling techniques is that the reading, writing, clearing, and compression of tile data is not as efficient as desired. In some graphics systems, such as graphics systems with 24 bit z data, z data may not pack efficiently into tiles.
Graphics systems increasingly use partitioned graphics memories to provide a larger effective memory bandwidth and memory size than possible with a single memory chip having a single bus. Additionally, a partitioned memory can provide more efficient use of memory bandwidth. In a partitioned graphics memory, several memory chips are coupled to a memory controller. FIG. 1 illustrates a partitioned memory described in more detail in U.S. patent application Ser. No. 09/687,453, entitled “Controller For A Memory System Having Multiple Partitions,” commonly assigned to the assignee of the present invention, the contents of which are hereby incorporated by reference. In the partitioned graphics memory of FIG. 1, the physical memory is a memory array 24 comprising two or more operable partitions 26a, 26b, 26c, and 26d. Each memory partition has its own individual bus 28a, 28b, 28c, and 28d connecting it to a memory controller 30. The memory controller 30 includes queues 32, 34, 36, 38, 40, 42, 44, and 46 and control logic (not shown) to determine routing to the partitions such that the partitioned memory appears as a non-partitioned memory to clients, such as host 12, texture 14, z read/write module 16, color module 18, or display 20.
Tile data may be stored in a partitioned memory system. As with other graphics memories, the efficient use of tile data is of concern in partitioned memory systems.
Therefore, what is desired is an improved system, data format, and method for utilizing tiles in a graphics memory, including partitioned and non-partitioned graphics memories.